This wiki describes UsbPix teststand. Alternatively, consider using RCE, HSIO setup (see a collection of links in this page.
How to test a USB3 of MMC3 card without FE-I4B To established correctly USB3 communication with MMC3, use the first 3 lines of the example usage here https://silab-redmine.physik.uni-bonn.de/projects/pysilibusb/wiki. Afterwards, you can configure the FPGA, connect FE-I4B and run a digital scan.
Step-by-step setup instruction for a fresh Windows 7 (64-bit at ANL)
Follow the steps in https://github.com/SiLab-Bonn/pySiLibUSB/wiki to install the usb3.0 in windows 7
Second follow the steps in https://github.com/SiLab-Bonn/pyBAR/wiki/Step-by-step-Installation-Guide
change “basil” in line 74 to “basil_daq”. You will need the branch “mio3” from github. Download the file “basil-mio3.zip”, go to “host” directory and install as “python setup.py install”. It will be copied somewhere in Miniconda directory. If you will use wrong basil, when running “python scan_analog.py”, you will get a complain about “FPGA” and “basil”.
Download pySiLibUSB from https://github.com/SiLab-Bonn/pySiLibUSB. Then replace the python file “siusbdevice.py” in pySiLibUSB/SiLibUSB/siusbdevice.py provided by the SiLab and install it as “python setup.py install.
Then test the usb3 using a Python script with the following lines (The USB3 cable should be connected to the board):
import SiLibUSB sidev = SiLibUSB.SiUSBDevice() print "FWVersion: ", sidev.GetFWVersion() sidev.WriteExternal(0x0000, [0xaa,0x55,0xaa,0x55]) print sidev.ReadExternal(0x0000, 4)
If succeed you should see:
If python though Error eg: “No device Found”
uninstall the driver for “FX3” in Device manager (click Delete the driver software for this device) Do search for device, then using Zadig to install the winusb dirver for it.
Need to be done every time if the board been powered off
by default the raw data are converted and stored inform of HDF5 file. The .h5 file can be opened using:
vitables 56_module_test_digital_scan_fe1.h5
The raw data contains all FE words + FPGA trigger words + FPGA TDC words in an one dimensional array. Every word is a 32-bit unsigned int. The format is: 82444303 = 0 000 0100 1110 1010 0000 0000 0000 1111
If the first bold bit is 1 the word is a trigger word followed by a trigger number. If it is 0 the following bits indicate the FE number. This number is usually 5 when you use the single chip adapter card. With other adapter cards (e.g. burn-in card) this number identifies the different FE connected to it. The remaining 24-bits hold the FE word. For more information (e.g. TDC word) please look https://github.com/SiLab-Bonn/pyBAR/blob/master/pybar/analysis/RawDataConverter/defines.h.
The meta data stores read out related infos:One row is added for every read out. It contains the word index at the first / last+1 word of the read out and the total numbers of words. To allow time based analysis it also has a timestamp and an error code indicating read out errors (like out of sync). The error code is not used so far.
All configuration parameters needed to be able to repeat the scan are stored here in different nodes. This includes the Front-End configration, the specific run configuration etc.
In the parameter table the parameters that are changed during a scan is monitored (e.g. PlsrDAC setting during a threshold scan). At every readout the acutal parameter settings is added to the table. One column is reserved for one parameter.
The raw data is interpreted, analysed and plotted with the raw data converter class. The output HDF5 file can hold hit data, cluster data, meta data and histograms at different HDF5 notes.
The hit data table stores the information for every hit.
The columns are:
Clustered data is usually stored as additional nodes in the analyzed data file or in a new file. The nodes are cluster hits, cluster or histograms.
The table ClusterHits is a copy of the Hits table (see above) but with four additional columns:
The table Cluster stores the infos for each cluster.
The columns are:
pyBAR provide few scripts under pybar/scan for raw data analysis.
python analyze_example_conversion.py (on windows 7)
(Remember to change the file name in the script to the raw HDF5 file you would like to analysis)
The converted raw data then stored as interpreted HDF5 file. It can be converted to root file using:
python convert_table_root_tree.py (on ATLAS cluster)
(Remember to change the file name in the script to the interpreted HDF5 file you would like to convert)
FX3 and FPGA firmware that you are uploading is not permanently stored on the board. Instruction from Viacheslav Filimonov:
— Sergei Chekanov 2016/01/02 03:17 — Rui Wang 2016/03/02 02:27