The Fast TracKer (FTK) to Level-2 Interface Card (FLIC) of the ATLAS FTK trigger upgrade is the final component in the FTK chain of custom electronics to connect the system to the High-Level trigger (HLT). The FTK performs full event tracking using the ATLAS Silicon detectors for every Level-1(L1) accepted event at 100 kHz. The FLIC is a custom Advanced Telecommunications Architecture (ATCA) card that interfaces the upstream FTK system with the ATLAS trigger and data acquisition (TDAQ) system, and allows for event processing on commercial PC blades, making use of the 10 Gb Ethernet full mesh ATCA backplane.

FLIC specification 03092016_atlas_ftk_creat_sys_spec_1.7.1.doc

• 18-layer circuit board, standard FR-4
• 2 Virtex-6 FPGAs as the data processor (1&2)

1. Each has 128 Mbit of fast SRAM (32 Mbit per SFP input) to implement data-driven lookup tables
2. Track geometry data from the lookup table are inserted into the data stream “on the fly”

• 2 Virtex-6 FPGAs as the ATCA interface (3&4)

1. Each implements two 10Gb Ethernet interfaces to ATCA backplane (total 40Gb output bandwidth)
2. Each has 8 SERDES links of input from I/O processor FPGAs, matched to total ATCA output bandwidth
3. Distribute data, from the FLIC to the multiple processor blades

• Full, matched-bandwidth internal mesh of SERDES links between all FPGAs internalmash.pdf
• General-purpose DDR3 memory per FPGA forbuffering or event record building

slowcontrol.pdf

The new data format agreed on March 7th,2016 is summarized in 20160307_flic_data_formats_checking.xls

https://edms.cern.ch/ui/file/1347323/2.3/FTK_DataFormat_v2.3.pdf